The present invention relates generally to methods and apparatuses for protecting electronic systems from theft of sensitive information, and more particularly to a method and apparatus for protecting an electronic system from theft of sensitive information by preventing reverse engineering of the circuits employed in the electronic system.
Many electronic systems and devices use data encryption security schemes to protect sensitive information, e.g., personal data, financial transaction authorization codes, security passwords, etc. These schemes rely on a stored encryption key or security key that must be physically and electrically inaccessible to unauthorized access.
Storage methods include magnetic storage, e.g., disk drives, optical storage, compact disks and electronic media (such as memory integrated circuits). Disk storage, both magnetic and optical, is not secure because data can be read off the disks and reverse engineered by various methods to determine the encryption or security keys.
For added security, the keys can be stored in an electronic memory circuit on an integrated circuit. Specialized equipment is required to remove the packaging materials of these devices and reverse engineer the key. However, integrated circuits are vulnerable to reverse engineeringxe2x80x94even data stored in FLASH or EEPROM or other non-volatile memory or battery backed memories.
Some methods used to enhance the security of these integrated circuits include physical approaches, e.g., 1) locking or sealing cases to enclose the circuit boards on which memory devices are mounted, 2) using special packaging that destroys the integrated circuit if there is tampering, or 3) using metal layers to mask the storage elements from sensing equipment. For example, FIG. 3 depicts an implementation of the third method above in a cross-sectional view. The chip including the transistors is covered with several thick metallization layers. As recognized by the prior art, the transistor tubs generate heat that can be scanned to determine which transistor is charged, thereby decoding the stored information. Alternatively, circuit reverse engineering can be performed to determine the encryption keys. To prevent either of these possibilities, thick layers of metallization are used to spread the thermal signature. This security protection can be defeated by partial and complete removal of portions of the metallization layer.
FIG. 4 depicts a detailed view of the implementation shown in FIG. 3. As evident, the thermal signature exists on the surface of the chip. Scanning equipment can also be used to detect the charge levels on the chip surface.
Other security methods include electronic circuitry, e.g., circuits that detect removal of power to the system/device, sensors that detect tampering, and continuity circuits in the packaging or on the integrated circuits that scramble stored data if tampering is detected.
All of the above methods are vulnerable to one sophisticated in the art of reverse engineering. For example, continuity circuitry can be defeated by ensuring that power is constantly applied, metal lids can be shorted with jumpers, ceramic packages that shatter if opened and metal layers deposited over portions of the integrated circuit can be etched away by physical and mechanical means.
Once the circuitry of the chip is exposed, sensing equipment, such as a low voltage scanning electron microscope (SEM) or a thermal scanner can be used to determine the stored charges of transistors on the chip and decode the keys. Alternatively, probes can be used to directly or indirectly sense charges on the chip.
The present invention is therefore directed to the problem of developing a method and apparatus for protecting an integrated circuit from being reverse engineered so that the stored information on the circuit cannot be determined.
The present invention solves this problem by splitting the functionality of an integrated circuit into two separate chips which are then connected in an interlocking manner. In addition, the present invention provides a detection circuit that monitors the interconnection of the two chips, and which destroys the stored data upon detection of a break in the interconnection of the two chips.
In one embodiment of the present invention, the two chips are connected in a flip-chip fashion, thereby preventing access to the underlying conduction paths and charge storage sites which are used in reverse engineering an integrated circuit.
In an alternative embodiment of the above embodiment, the flip-chip is only provided over a portion of the active chip that includes the sensitive information. This reduces the size and complexity of the total device.